1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a high-voltage power semiconductor device.
2. Description of the Related Art
FIG. 30 is a top view of a conventional horizontal n-channel IGBT (Insulated Gate Bipolar Transistor) generally denoted at 1000. FIG. 31 is a cross sectional view of FIG. 30 taken along the direction X-X.
As shown in FIG. 31, the IGBT 1000 includes a p-type substrate 1. The p-type substrate 1 seats an n− layer 2 in which an n-type buffer layer 3 is formed. There is a p-type collector layer 4 in the n-type buffer layer 3.
A p-type base layer 5 is formed in the n− layer 2, over a predetermined distance from the p-type collector layer 4. In the p-type base layer 5, an n-type emitter layer (n+) 6 is formed so that it is on the inner side relative to a peripheral portion of the p-type base layer 5 and shallower than the p-type base layer 5. A p-type emitter layer (p+) 7 as well is formed in the p-type base layer 5.
A field oxide film 8 is formed on the surface of the n− layer 2 which is located between the n-type buffer layer 3 and the p-type base layer 5. On a channel region 15 formed in the p-type base layer 5 and located between the emitter layer 6 and the n− layer 2, a gate wire 10 is disposed via a gate oxide film 9. Further, there is a protection film 11 which is disposed covering the field oxide film 8, etc.
A gate electrode 12 is disposed such that it is electrically connected with the gate wire 10. An emitter electrode 13 is further disposed such that it is electrically connected with both the n-type emitter layer 6 and the p-type emitter layer 7. In addition, a collector electrode 14 is disposed such that it is electrically connected with the p-type collector layer 4. The emitter electrode 13, the collector electrode 14 and the gate electrode 12 are electrically isolated from each other.
As shown in FIG. 30, the p-type collector layer 4 is located at the center of the IGBT 1000 in which structure the n-type buffer layer 3, the n− layer 2, the p-type base layer 5, the n-type emitter layer 6 and the p-type emitter layer 7 surround the p-type collector layer 4 in this order, and this structure has an endless shape which is defined by connecting two semi-circular sections by straight sections. For easy understanding, FIG. 30 omits the field oxide film 8, the gate oxide film 9, the gate wire 10, the gate electrode 12, the protection film 11, the emitter electrode 13 and the collector electrode 14 (Japanese Patent No. 3647802).
FIG. 32 shows a collector-emitter current (ICE) characteristic which the IGBT 1000 exhibits upon application of a collector-emitter voltage (VCE) in a condition that a constant gate-emitter voltage (VGE) is applied upon the IGBT 1000. The collector-emitter voltage (VCE) is measured along the horizontal axis, whereas the vertical axis denotes the collector-emitter current (ICE) A room temperature is a temperature for measurement.
From FIG. 32, one can see that as VCE gradually rises, ICE becomes approximately 0.2 A when VCE reaches 6V or becomes close to 6V and beyond this, ICE tends to get saturated. This causes a problem that however high VCE becomes, ICE will not become sufficiently large.
There is another problem that as the gradient expressing ICE remains moderate while VCE grows from 0V to 6V and the ON-resistance (VCE/ICE) is therefore high.
FIG. 33 shows the turn-off waveform of the IGBT 1000. The turn-off time is measured along the horizontal axis and the collector-emitter voltage (VCE) or the collector-emitter current (ICE) is measured along the vertical axis. In FIG. 33, the symbol (AV) denotes changes of the VCE value and the symbol (AI) denotes changes of the ICE value.
As one can tell from FIG. 33, the fall time (i.e., the time needed for ICE to come down to 10% from 90% of the maximum value) has a large value exceeding 1 μs. The junction-isolated (JI) horizontal IGBT 1000 in which the IGBT is formed in the n− layer 2 on the p-type substrate 1 thus has problem that its switching speed is slow and it has a large switching loss.
The horizontal IGBT 1000 has a further problem that at short-circuit in an inverter circuit or the like latches up a parasitic thyristor which is formed by the p-type collector layer 4/the n-type buffer layer 3/the n− layer 2/the p-type base layer 5/the n-type emitter layer 6 and increases the current density of the IGBT 1000 so that the IGBT may get destroyed easily.